IBM debuts world's first sub-1nm chip with 'nanostack' 3D architecture
IBM unveiled the world's first sub-1 nanometer chip technology on June 25, 2026, built on a revolutionary 0.7 nm (7 angstrom) node using a new three-dimensional 'nanostack' transistor architecture developed at its Yorktown Heights research facility. The chip packs nearly 100 billion transistors onto a fingernail-sized surface — nearly twice the density of IBM's 2 nm chip from 2021 — and is projected to deliver up to 50% more performance or 70% greater energy efficiency compared to that predecessor. Validated at VLSI 2026, the nanostack design also achieves 40% SRAM scaling, supporting high-bandwidth AI workloads. The breakthrough pushes semiconductor scaling into the angstrom era and extends IBM's chip roadmap by at least a decade, with direct implications for generative AI, cloud infrastructure, and next-generation computing devices.
newsroom.ibm.com